Monday 23 June 2014

NMOS PMOS

CMOS is the short form for the Complementary Metal Oxide Semiconductor. Complementary stands for the fact that in CMOS technology based logic, we use both p-type devices and n-type devices.
Logic circuits that use only p-type devices is referred to as PMOS logic and similarly circuits only using n-type devices are called NMOS logic. Before CMOS technology became prevalent, NMOS logic was widely used. PMOS logic had also found its use in specific applications.
Lets understand more how NMOS logic works. As per the definition, we are only allowed to use the n – type device as building blocks. No p-type devices are allowed. Lets take an example to clarify this. Following is the truth table for a NOR gate.

Figure : NOR truth table.

We need to come up the a circuit for this NOR gate, using n-mos only transistors. From our understanding  of CMOS logic, we can think about the pull down tree, which is made up of only n-mos gates.

Figure : NOR pulldown logic.

Here we can see that when either of the inputs ‘A’ or ‘B’ is high, the output is pulled down to the ground. But this circuit only reflects the negative logic, or the partial functionality of NOR gate when at least one of the inputs is high. This doesn’t represent the case where both input area low, the first row of the truth table. For an equivalent CMOS NOR gate, there would be pull up tree made up of p-mos devices.
But here we are referring to NMOS logic and we are not allowed to have p-mos devices. How could we come up with the pull up logic for our NOR gate ? The answer is a resistor. Essentially when both n-mos transistor are turned off, we want ‘out’ node to be pulled up and held at VDD. A resistor tied between VDD and ‘out’ node would achieve this. There could be other possible elaborate schemes to achieve the same using n-mos transistors for pulling up purpose, but an n-mos as a resistor is used to pull up the output node.
Of course you see some immediate drawbacks. You can see that when at least one of the pull down n-mos is on, there is a static bias current flowing from VDD to the ground even in the steady state. Which is why such circuits dissipate almost an order of magnitude more power compared to CMOS equivalent. Not only that, this type of circuit is very susceptible to the input noise glitches.
Any n-mos device can be made into a resistor by making it permanently on. N-mos device has inherent resistance and we can achieve the desired resistance by modulating the width of n-mos transistor.

Figure : NMOS logic NOR gate.

The above figure shows the NOR gate made using NMOS logic. Similarly any gate can also be made using PMOS logic.

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